An integrated circuit generally includes multiple input/output (I/O) circuits. Each of these I/O circuits may be used to transfer signals to the integrated circuit from external circuitry or from the integrated circuit to external circuitry. A termination circuit, which is generally formed as part of each of these I/O circuits, provides termination impedances to incoming signals from external interconnections. A termination circuit with the proper termination impedances may reduce signal losses by way of signal reflections.
An I/O circuit with a termination circuit, however, may be bandwidth-limited and may consequently only be able to send and/or receive signals up to a certain frequency before the transmissions are distorted. Any signals transmitted through termination circuitry having frequencies outside of the frequency range of the termination circuitry may be subject to distortion. The signals may be distorted due to termination impedances provided by the termination circuit varying as a function of the frequency of the signals transmitted through the termination circuit.
Specifically, the termination impedances provided by the termination circuit may be substantially constant for signals below a particular threshold frequency but variable for signals above the particular threshold frequency. As an example, the termination impedances of the termination circuitry can decrease linearly with increasing frequency of the signals transmitted through the termination circuitry.
Therefore, such distortions limit I/O circuits with termination circuitry from being used in applications in which signals are transmitted using high frequency protocols, such as double data rate 3 (DDR3) and double data rate 4 (DD4) signal protocols. Conventional I/O circuits are also limited in the transistor technologies/processes used to implement the termination circuitry. As an example, fin field effect transistor (FinFET) structures as part of the termination circuit may cause a further undesired drop in termination impedances due to the larger gate-source and/or gate-drain capacitances of FinFET transistors relative to conventional planar transistors. These increased capacitances associated with FinFET transistors may exacerbate the high frequency distortion of transmitted signals due to impedance variations, and can also further limit the usable bandwidth of frequencies that the I/O circuits and termination circuitry can be used to transmit.
It would therefore be desirable to implement termination circuitry in I/O circuits that can be designed with various transistor technologies and that have an improved and increased usable signal transmission bandwidth.